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signal integrity toolbox documentation -凯发k8网页登录

simulate and analyze high-speed serial and parallel links

signal integrity toolbox™ provides functions and apps for designing high-speed serial and parallel links. you can generate experiments covering multiple parameters, extract design metrics, and visualize waveforms and results. you can predict operating margins and link performance by analyzing transmitter, receiver, and channel interactions.

the toolbox supports standard-compliant ibis-ami models for statistical and time-domain simulation to analyze equalization and clock recovery. you can describe the channel using multiport s-parameter data, ibis, hspice, and analytical models.

signal integrity toolbox lets you analyze waveforms and eye diagrams and measure channel quality while observing effects such as isi, jitter, and noise. you can analyze the channel in the frequency domain for insertion loss, return loss, and crosstalk, and verify compliance with industry standards including ieee 802.3, oif, pcie, and ddr.

before layout, you can evaluate tradeoffs and optimize parallel and serial links for cost, performance, reliability, and compliance. you can then perform post-layout verification of the system and correlate simulation results with measurement data.

get started

learn the basics of signal integrity toolbox

serial link design

design high speed serial links such as pcie, usb, and ethernet

parallel link design

design parallel links such as ddr

signal integrity kits for industry standards

implement industry-standard applications (pci, ddr, cei, usb and more) using prepackaged signal integrity kits

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