programmable logic -凯发k8网页登录

design and develop the custom hardware for the programmable logic (pl) or fpga component of an soc application

analyze a simulink^® model by using the socmodelanalyzer function to estimate the resources used in a model, to compare different architectures, and to understand design tradeoffs. use the socfunctionanalyzer function to analyze resources in a matlab^® function.

the socmodelanalyzer and socfunctionanalyzer functions create a report detailing the number of operations in a simulink model or a matlab function, respectively.

use the information in the report to:

decide how to partition your algorithm into software and hardware.
optimize a hardware algorithm.
optimize a software algorithm.
compare different implementations of an algorithm to make informed decisions about design choices.

functions

	estimate number of operations in simulink model
	estimate number of operations in matlab function
	open algorithm analysis report
	export custom reference design for hdl workflow advisor

tools

visualize, measure, and analyze transitions and states over time

model settings

topics

when your fpga model includes more than one block for which you'd like to generate hdl using hdl coder™, you must use a connector model to connect your blocks.
using the algorithm analyzer report
navigate details of the report generated by the socmodelanalyzer or socfunctionanalyzer function.
export custom reference design from soc model
use the socexportreferencedesign function to export a custom reference design from an soc blockset™ model.

troubleshooting

unsupported mode in when generating soc design using soc builder.

featured examples

compare fir filter implementations using socmodelanalyzer

analyze and compare different implementations of a simulink® algorithm based on the number of arithmetic operations. use the soc blockset socmodelanalyzer function to generate reports that show the number of operators for different implementations of a fir filter using static and runtime execution.