• documentation
main content

generate tests -凯发k8网页登录

generate sets of tests to satisfy model and code coverage and custom testing criteria

test generation produces sequences of input values for your models to satisfy testing criteria, such as model coverage. simulink® design verifier™ extends existing model coverage information from requirements-based tests. it generates additional sequences of test inputs that meet the coverage objectives not satisfied during requirements-based testing. use these test inputs to better understand missing requirements and to create a more complete test harness.

blocks

constrain signal values in test cases
define custom objectives that signals must satisfy in test cases
detect true duration on input and construct output true duration based on output type
extend true duration of input
specify condition that produces a certain response
verify response occurs within desired duration
specify proof or test objectives without impacting simulation results or generated code

functions

create design verification options object
test condition function for stateflow charts and matlab function blocks
test objective function for stateflow charts and matlab function blocks
extract subsystem or subchart contents into new model for analysis
identify, change, and display timer optimizations
create design verification options object
analyze model
log simulation input port values
analyze models to obtain missing model coverage
generate spreadsheet containing test cases
simulate model by using input data
generate simulation or execution options for sldvruntest or sldvruncgvtest
default options for sldvmakeharness
generate filter file containing justification rules for objectives with unsatisfiable, dead logic, falsified, falsified - no counterexample, or error - needs simulation status in sldvdata file
generate harness model
merge test cases and initializations into one harness model
generate simulink design verifier report
returns checksum of model

topics

start here


  • brief overview of test case generation with simulink design verifier.

  • outlines a process for generating test cases for your model.

  • explains when to extend existing test cases to create a complete test suite.

  • this example shows how to use simulink® design verifier™ functions to log input signals, create a harness model, generate test cases for missing coverage, merge harness models, and execute test cases.

  • describes how to generate test cases in simulink test™ using simulink design verifier analysis results, which can be generated by property proving, design error detection, and test case generation.

  • automate test generation and execution by using models that contain requirements table blocks.

  • this example shows how simulink® design verifier™ can extend test cases with additional time steps to efficiently generate complete test suites.

  • use the test generation advisor to guide model and component analysis.

  • reanalyze a model by reusing the model representation.

  • to generate test cases for enhanced modified condition decision coverage (mcdc) coverage objectives:

generate tests for model decision coverage


  • test cases are generated to drive your model to satisfy condition, decision, modified condition/decision (mcdc), and custom coverage objectives.

  • an example that walks you through the process of generating test cases for a model.

  • an example of how to specify parameter constraint values to achieve full model coverage.

  • analyze an individual subsystem.

  • analyze a reusable library subsystem.

  • extends existing test cases to analyze a model that uses temporal logic.

  • extends existing test cases to analyze a closed-loop system in a model.

  • extends existing test cases for a model that you have previously analyzed and then modified.

  • this example shows how to use simulink® design verifier™ to extend an existing test suite to obtain missing model coverage.

  • this example shows how to achieve missing coverage by extending existing test cases after applying parameter configurations.

  • explains how to use cross release workflow for model upgrade by using simulink design verifier.

generate tests for custom code in a model


  • this example shows how to compile an s-function to be compatible with simulink® design verifier™ for test case generation.

  • test generation on a model with a c caller block and custom c code.

  • test generation on a model with custom code in a stateflow chart.

  • simulink design verifier analysis supports models that call custom code from matlab® function blocks by using coder.ceval.

  • describes limitations and considerations of s-functions and generated code in simulink design verifier.

generate tests for analyzable model components


  • generate test cases for model reference blocks.

  • use the test generation advisor to guide model and component analysis.

  • this example shows how to use simulink® design verifier™ to generate test cases for a model block by using a default top model simulation.

  • explains how to convert subsystems to model blocks before attempting to achieve missing coverage.

  • achieves missing coverage data in a referenced model and combines it with coverage data for the top-level model.

  • achieves missing coverage data in a closed-loop simulation model.

  • describes how to generate tests for lookup table boundary value coverage.

  • this example shows how simulink® design verifier™ can target its analysis to a single subsystem within a continuous-time closed-loop simulation and generate test cases for missing coverage in that subsystem.

  • this example shows you how to achieve model coverage in models with variable-size input signals by using simulink design verifier™.

  • this example shows you how to test for missing coverage in custom code.

  • this example shows you how to use use simulink® design verifier™ to generate test cases that achieve full coverage.

  • inspect test generation objectives using model slicer.

generate tests to complete coverage of generated code


  • this example shows how to use simulink® design verifier™ to generate test cases to obtain complete code coverage.

  • outlines a process for generating test cases for generated code.

related information


网站地图