verification with fpga hardware -凯发k8网页登录

connect an fpga board with matlab^® and simulink^® for verification and debug of hardware designs

these features provide connections between your fpga board and your simulations in simulink or matlab.

fpga-in-the-loop (fil) enables you to run a simulink or matlab simulation that is synchronized with an hdl design running on an intel^®, microchip, or xilinx^® fpga board.
fpga data capture is a way to observe signals from your design while the design is running on the fpga. it captures a window of signal data from the fpga, based on your configuration and trigger settings, and returns the data to matlab or simulink.
axi manager provides access to live on-board memory locations from matlab or simulink. you must include the axi manager ip in your fpga design.

to use these features, you must download a hardware support package and set up your fpga board. for more information, see and .

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